In a conventional H-bridge current mode driver circuit, there exists a potential for power-up timing differences between P-type and N-type transistors in the driver circuit, which generate differences in current magnitude between sink and source current paths in the circuit. In an ideal scenario, the respective currents in the P-type and N-type transistors are identically matched in magnitude and timing, and thus common mode circuitry in the driver circuit would not be required to sink or source any current thereby allowing the driver circuit to maintain a prescribed common mode voltage level. However, any difference between the respective currents in the P-type and N-type transistors requires the common mode circuitry to deliver a mismatch current. The finite output impedance of the common mode circuitry in combination with the voltage (i.e., current×resistance (IR)) drop of the mismatch current results in a disturbance in the common mode voltage level.